1. Field of the Invention
This invention relates to packaging of computing systems and more particularly to packaging of large computing systems that include one or more central electronic complexes (CECs).
2. Description of Background
The industry trend has been to continuously increase the number of electronic components inside computing systems. A computing system can include a simple personal computer, a network of simple computers, or one or even a network of large computers that include one or more central electronic systems (CEC). While increasing the components inside a simple computing system does create some challenges, however, such an increase create many problems in computing systems that include one or more large computers. In such instances many seemingly isolated issues affect one another, especially when packaged together in a single assembly or networked or housed to other systems that are stored in close proximity.
A challenging problem associated with design and manufacture of computing systems, and especially large ones, is the issue of minimizing dynamic loading effects. In many instances CECs and other similar large computers are housed in an assembly and the assembly is then placed in a rack or frame with other CECs or components. Since every rack and every assembly often includes a variety of electronic components (such as daughter cards, elements and components that support logic entities, mid-plane boards and the like), in a dense packaging environment, the dynamic loading effects of such components can also cause electrical and mechanical failures if not dealt with adequately.
In order to minimize adverse dynamic loading effects, prior art frames that house CECs and other large computers have traditionally been designed to incorporate components that ensure structural integrity. Unfortunately, sometimes designing structurally sound frames can create other problems during installation and service. One such problem is plug-ability of node or electronic components. This problem is becoming more pronounced especially with next generation computers that incorporate many components. Misalignment during plugging may damage connector housings, contacts, or solder connections to the board. The structural integrity and support mechanisms demanded by the need for robust package integration become more compromised as the ever increasing density results in less available space to implement this adequately.
Consequently and in light of the prior art current designs that affect overall system performance of CECs and other similar computer systems, it is desirable to implement an assembly and corresponding method of packaging that can support high density components and address dynamic loading issues of such components while improving the plug-ability of issues.